Designing my own high-end router: the block diagram.

Building a 10 GB Router: PCB Planning

Introduction to the Project

• The speaker introduces the project of creating a 10 GB router from scratch, emphasizing the importance of planning.

• A blog diagram will be sketched out to outline specifications and features, including CPU choice.

Router Specifications

• The router is planned to have at least two 10 GB capable ports (one RJ45 and one SFP+), although initially three were considered.

• The chosen CPU supports four gigabit ports, with RAM set at 8 GB and storage at 64 GB to meet open-source firewall requirements.

• A critical requirement is that the router must handle at least a gigabit of intrusion detection and prevention for security purposes.

CPU Selection

• The selected CPU is the Layerscape 1046A by NXP, priced around $73, which meets all specified requirements.

• Comparisons are made with Intel CPUs like N95 or N100; Layerscape is preferred due to cost-effectiveness and built-in Ethernet interfaces.

Design Considerations

• The speaker discusses potential flexibility in chip selection based on audience feedback but emphasizes current focus on the blog diagram.

Understanding Blog Diagrams

• A blog diagram represents system components as blocks connected by lines showing their relationships.

• The first component discussed for inclusion in the diagram is the CPU, followed by power delivery needs.

Power Requirements

• Power delivery (PD), not PSU, will be used since an external power brick suffices; the CPU consumes about 15 watts under full load.

Clock Generators

• Two clock generator chips are needed: a real-time clock (RTC), oscillating at 32,768 kHz for time reference, and a base clock generator operating at 100 MHz for coordination between components.

Memory and Storage Types

Understanding Solid State Drives and Embedded Systems

Introduction to Solid State Drives

• Most modern solid-state drives (SSDs) are likely present in your computer, and upgrading to one is recommended for better performance.

• Unlike NAND flash used for operating system storage, NOR flash is typically smaller and primarily utilized for boot code, akin to BIOS functionality.

Assembling an Embedded Device

• The current assembly includes a CPU, power supply, clocks, memory, and storage; however, it lacks peripherals.

• The speaker humorously discusses the pronunciation of "router" and invites viewers to share their own pronunciations in the comments.

Adding Networking Components

• The design process will now focus on integrating ports into the device layout, starting with 4 GB ports followed by a 10 Gbit port.

• Magnetics play a crucial role in electrical isolation between components; transformers transfer energy without direct contact while providing EMI shielding.

Media Independent Interfaces (MII)

• MII allows various devices to connect regardless of type; this concept is similar to how household sockets function with different appliances.

• MAC addresses originate from media independent interfaces and represent Layer Two in the OSI model above the physical layer.

Converting Ethernet Frames

• A chip known as "Phi" converts Ethernet frames from Layer Two signals into electrical signals at Layer One.

• Two F chips will be used: one for the 4 GB ports (which can be combined into one chip), and another for the 10 Gbit port that requires no additional chip due to integrated features.

Ensuring Signal Integrity

• A retimer chip ensures high-speed signals from the CPU remain clean before entering SFP+ modules for long-distance transmission.

Powering and Connecting Peripherals

• Three USB Type-C connectors will be added: one for power (5 volts), another as a console port using UART technology, and a third as a standard host port for USB drives.

Conclusion of Design Process

• The console port enables terminal access via USB-C on Mac systems using screen commands similar to SSH connections on Linux servers.