Comunicación Serie - Capitulo 5 - La clase uart - parte 1

Microcontrollers and Asynchronous Serial Communication: Class W Design

Introduction to Class W

• The video focuses on the design and implementation of Class W, using LPC 845 as a base while emphasizing programming strategies.

• It assumes prior knowledge from previous chapters, highlighting that the work will primarily involve software primitives between application layers and drivers for code portability.

Key Variables in Class W

• Discussion on member variables for Class W includes communication parameters like speed, parity, stop bits, and data bits.

• Additional considerations include transmission/reception buffers and a flag indicating if transmission is active; this aids in maintaining code portability across microcontrollers.

Implementation Details

• The flag for transmission should be boolean (flag tx), with circular buffers defined for both transmission and reception to interface with driver functions.

• Communication parameters are initially necessary for configuration but not used afterward; however, obtaining these from registers could be beneficial as an exercise.

Accessing Registers

• Each Word has specific memory locations with well-defined sub-registers; access requires pointers to these blocks based on selected Word numbers.

• The constructor will need a pointer to the chosen Word block to facilitate operations within the class.

Public Methods Overview

• Public methods will include constructors along with at least one method each for transmitting and receiving data through defined buffers.

• Data transfer involves writing characters into the transmission buffer via a primitive transmit function that interacts with an interrupt service routine (ISR).

Interrupt Handling Mechanism

• The ISR accesses private members of Class W either through getters/setters or by declaring it as a friend function; creating a dedicated method within the class is preferred for simplicity.

• Private members include buffers, flags, and pointers while public members consist of constructors, destructors (if needed), transmit/receive methods, and ISR handling methods.

Constructor Parameters

• Initial steps in constructing involve enabling peripherals and defining clock sources by accessing system configuration registers.

• A structure provided by the manufacturer simplifies access to these registers during initialization processes.

Peripheral Configuration Steps

• Enabling peripheral clocks involves setting specific bits corresponding to each Word in control registers; an indexable array can streamline this process.

• Resetting peripherals is recommended before use; similar bit positions apply when configuring clock sources.

Pin Configuration Process

• Configuring pins requires invoking functions with port/pin values passed during construction. Specific calculations are needed based on pin locations within switch matrices.

Constructor Development Progression

• Arrays indexed by Word numbers help manage pin assignments effectively. Current progress includes enabling clocks, resetting peripherals, selecting clock sources, and assigning pins.

Communication Parameter Setup

• Parameters such as speed and data bits are configured next. Notably, two stop bits are often unnecessary in modern communications leading to their exclusion from options.

Register Address Management

• Start addresses of each Word can be stored in an array indexed by their respective numbers allowing easy access during configuration tasks.

CFG Register Configuration

• Focus shifts towards configuring essential fields within the CFG register including data bit count while ensuring proper communication settings without prematurely enabling functionality.

Finalizing Interruptions

• Habilitation of interruptions occurs first at peripheral levels followed by core microcontroller settings ensuring smooth operation upon receiving or transmitting data.

Conclusion of Video Content

• Overall summary emphasizes structured development of Class W focusing on effective management of configurations alongside robust handling mechanisms tailored towards efficient microcontroller communication protocols.