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DVD - Lecture 1a: Introduction
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DVD - Lecture 1a: Introduction

Introduction to Digital VLSI Design

In this section, Dr. Adam Thiemann introduces the course and provides an overview of what will be covered.

Motivation for the Course

  • The invention of the integrated circuit in 1964 was a significant milestone in computer history.
  • Intel's development of the first monolithic microprocessor in 1971 marked another major advancement.
  • Today's processors, such as the Core i7 6950X Extreme Edition, have over 3.2 billion transistors on a single chip.

Course Outline

  • The course will cover motivation, building a chip, design automation basics, and an overview of the chip design flow.
  • Each topic will be covered in detail throughout the course.

Challenges Facing Chip Designers

In this section, Dr. Thiemann discusses some of the challenges facing chip designers today.

Productivity vs Transistor Count

  • While transistor count has grown exponentially according to Moore's Law, productivity growth has not kept pace.
  • This discrepancy presents a challenge for chip designers who must find ways to work more efficiently.

Power Consumption

  • As transistor counts increase, so does power consumption.
  • This creates challenges for designing chips that are energy-efficient and do not overheat.

Complexity

  • Modern chips are incredibly complex with many different components and functions.
  • This complexity makes it difficult to design and test chips effectively.

Building a Chip: An Overview

In this section, Dr. Thiemann provides an overview of the process of building a chip.

Design Process

  • The design process begins with defining the specifications for the chip.
  • Next, designers create a high-level design and then refine it through several iterations.
  • Finally, they create a detailed layout of the chip.

Fabrication Process

  • Once the design is complete, it is sent to a fabrication facility where it is etched onto silicon wafers.
  • This process involves many steps and can take several weeks to complete.

Testing and Packaging

  • After fabrication, the chips are tested to ensure they meet specifications.
  • They are then packaged and shipped to customers.

Design Automation Basics

In this section, Dr. Thiemann discusses some of the basics of design automation.

Why Use Automation?

  • Design automation tools help designers work more efficiently by automating repetitive tasks.
  • They also help ensure that designs are error-free and meet specifications.

Types of Automation Tools

  • There are many different types of automation tools available for chip designers.
  • These include schematic capture tools, simulation tools, layout editors, and verification tools.

Chip Design Flow: An Overview

In this section, Dr. Thiemann provides an overview of the chip design flow.

Front-end vs Back-end Design

  • The front-end design process involves creating a high-level description of the chip's functionality.
  • The back-end design process involves creating a detailed layout of the chip.

Steps in the Design Flow

  1. Specification and Architecture
  1. RTL Design
  1. Verification
  1. Synthesis
  1. Place and Route
  1. Layout Verification
  1. Tapeout

Conclusion

  • The chip design flow is a complex process that involves many different steps.
  • Each step is critical to ensuring that the final product meets specifications and functions as intended.

Introduction

The speaker introduces the course and discusses the motivation for the course.

Course Motivation

  • The course aims to address how to close the gap in chip design without using too many transistors.
  • A theoretical system on a chip is presented as an example of a complex design challenge.

Three Categories for Solving Chip Design Problem

The speaker presents three categories that can help solve the problem of designing complex chips.

Design Abstraction

  • Engineers specialize in one part of the design and connect all abstractions together to deal with a bigger problem.

Design Automation

  • Use computers to work for us and help us get more out of what we can do.
  • Electric design automation is a key part of dealing with this huge problem.

Design Reuse

  • If someone has already designed something, why not use it instead of trying to design everything ourselves?
  • This can either be buying something off-shelf or designing it inside our company by a different team.

Course Overview

The speaker provides an overview of what will be covered in the course.

Lecture Topics

  1. Introduction
  1. Learning how to do register transfer level design with Verilog
  1. Logic synthesis static timing analysis
  1. Moving to the physical domain and starting the back end or physical implementation stage
  1. Placement clock tree synthesis routing
  1. Discussing I/O and packaging
  1. Design for tests

Approach

  • Hands-on learning approach
  • Learn algorithms behind each topic
  • Learn how to deal with problems associated with chip design

References Used in Course Development

The speaker lists references used in developing this course.

References

  • Rob Rutenbar's "From Logic to Layout" course on Coursera
  • Near Sever's course
  • Jan Rabbis and David Harris's books
  • Cadence support synopsis solvent
Playlists: Digital VLSI Design (RTL to GDS)
Video description

Bar-Ilan University 83-612: Digital VLSI Design This is Lecture 1 of the Digital VLSI Design course at Bar-Ilan University. In this course, I cover the basics of Chip Implementation, from designing the logic (RTL) to providing a layout ready for fabrication (GDS). Lecture 1 covers the motivation for the course and an introduction to the chip design process. Part 1a gives motivation and an introduction to the course. Lecture slides can be found on the EnICS Labs web site at: https://enicslabs.com/academic-courses/dvd-english/ All rights reserved: Prof. Adam Teman Emerging nanoscaled Integrated Circuits and Systems (EnICS) Labs Faculty of Engineering, Bar-Ilan University